Possibly generate register definitions

[berkus]

Review the possibility to obtain a jSON file with register definitions and generate code from that.

[thejpster]

https://developer.arm.com/-/cdn-downloads/permalink/Exploration-Tools-OS-Machine-Readable-Data/AARCHMRS_BSD/AARCHMRS_OPENSOURCE_A_profile_FAT-2025-12.tar.gz looks like the right JSON file.

[thejpster]

https://git.trustedfirmware.org/plugins/gitiles/arm-firmware-crates/arm-sysregs.git/+/refs/heads/main/generate-sysregs might serve as inspiration.

[thejpster]

https://crates.io/crates/arm-sysregs-json may also be useful.

[CUB3D]

I made a script based on this that generates an (incomplete) stub for a given register, might be useful as a starting point?

Script

import json
import os
import sys

BASE_PATH = "/home/cub3d/projects/aarch64-cpu"

tgt_reg = sys.argv[-1]

TEMPLATE_BITFIELDS = """
register_bitfields! {u64,
    pub @REGNAME@ [
@SUBFIELDS@
    ]
}
""".strip()

TEMPLATE_RO = """
// SPDX-License-Identifier: Apache-2.0 OR MIT
//
// Copyright (c) 2018-2026 by the author(s)
//
// Author(s):
//   - Callum Thomson <callumthom11@gmail.com>

//! <TODO> - EL1

use tock_registers::interfaces::Readable;
use tock_registers::register_bitfields;

pub struct Reg;

@BITFIELDS@

impl Readable for Reg {
    type T = u64;
    type R = ();

    sys_coproc_read_raw!(u64, "@REGNAME@", "x");
}

pub const @REGNAME@: Reg = Reg;
""".strip()

TEMPLATE_RW = """
// SPDX-License-Identifier: Apache-2.0 OR MIT
//
// Copyright (c) 2018-2026 by the author(s)
//
// Author(s):
//   - Callum Thomson <callumthom11@gmail.com>

//! <TODO> - EL1

use tock_registers::interfaces::{Readable, Writeable};
use tock_registers::register_bitfields;

pub struct Reg;

@BITFIELDS@

impl Readable for Reg {
    type T = u64;
    type R = ();

    sys_coproc_read_raw!(u64, "@REGNAME@", "x");
}

impl Writeable for Reg {
    type T = u64;
    type R = ();

    sys_coproc_write_raw!(u64, "@REGNAME@", "x");
}

pub const @REGNAME@: Reg = Reg;
""".strip()

TEMPLATE_WO = """
// SPDX-License-Identifier: Apache-2.0 OR MIT
//
// Copyright (c) 2018-2026 by the author(s)
//
// Author(s):
//   - Callum Thomson <callumthom11@gmail.com>

//! <TODO> - EL1

use tock_registers::interfaces::{Readable, Writeable};
use tock_registers::register_bitfields;

pub struct Reg;

@BITFIELDS@

impl Writeable for Reg {
    type T = u64;
    type R = ();

    sys_coproc_write_raw!(u64, "@REGNAME@", "x");
}

pub const @REGNAME@: Reg = Reg;
""".strip()


names = []
regs = set()
with open("./Registers.json") as f:
    j = json.loads(f.read())
    for r in j:
        if r["_type"] != "Register" or r["state"] != "AArch64":
            continue
        
        name = r["name"].lower()
        if name[-4:] not in ["_el0", "_el1", "_el2", "_el3"]:
            continue
        mrs = [a for a in r["accessors"] if a["name"] == "A64.MRS"]
        msr = [a for a in r["accessors"] if a["name"] == "A64.MSRregister"]

        can_read = len(mrs) > 0
        can_write = len(msr) > 0


        kind = None
        if can_write and can_read:
            kind = "rw"
        elif can_write and not can_read:
            kind = "wo"
        elif not can_write and can_read:
            kind = "ro"

        enc = None
        if len(msr) > 0:
            enc = msr[0]["encoding"][0]["encodings"]
        if len(mrs) > 0:
            enc = mrs[0]["encoding"][0]["encodings"]

        if enc:
            crm = int(enc["CRm"]["value"].replace("'", ""), 2)
            crn = int(enc["CRn"]["value"].replace("'", ""), 2)
            op0 = int(enc["op0"]["value"].replace("'", ""), 2)
            op1 = int(enc["op1"]["value"].replace("'", ""), 2)
            op2 = int(enc["op2"]["value"].replace("'", ""), 2)
            enc = (crm, crn, op1, op2, op0)
        else:
            continue


        if name in regs:
            continue
        regs.add(name)
        
        if kind == "ro":
            template = TEMPLATE_RO
        elif kind == "wo":
            template = TEMPLATE_WO
        elif kind == "rw":
            template = TEMPLATE_RW

        subfields = []

        fs = r["fieldsets"]
        if len(fs) == 0:
            continue
        fs0 = fs[0]
        vals = fs0["values"]

        for v in vals:
            if v["_type"] == "Fields.Reserved":
                continue

            #TODO: might want this one in outer and in cond
            if v["_type"] == "Fields.Field":
                continue
            if v["_type"] == "Fields.ImplementationDefined":
                continue
            if v["_type"] == "Fields.Array":
                continue
            if v["_type"] == "Fields.Dynamic":
                continue
            if v["_type"] == "Fields.Vector":
                continue

            if v["_type"] == "Fields.ConstantField":
                name1 = v["name"]
                start = v["rangeset"][0]["start"]
                width = v["rangeset"][0]["width"]
                values = []
                if "constraints" in v["value"]:
                    xx = v["value"]["constraints"]
                    if xx is not None:
                        for val in xx["values"]:
                            if val["_type"] != "Values.Value":
                                continue
                            a = int(val["value"].replace("'", ""), 2)
                            values += [a]
            elif v["_type"] == "Fields.ConditionalField":
                cfs = [x for x in v["fields"] if x["field"]["_type"] == "Fields.ConstantField"]
                if len(cfs) == 0:
                    continue
                name1 = cfs[0]["field"]["name"]
                start = v["rangeset"][0]["start"]
                width = v["rangeset"][0]["width"]
                values = []
            else:
                exit(0)
                

            sf = {}
            sf["name"] = name1
            sf["start"] = start
            sf["width"] = width
            sf["values"] = values
            subfields += [sf]

        names += [(name, template, enc, kind, subfields)]

for (n, template, enc, kind, subfields) in names:

    if n != tgt_reg.lower():
        continue

    pth = f"{BASE_PATH}/src/registers/{n}.rs"

    with open(pth, "w") as f:
        out = template.replace("@REGNAME@", n.upper())

        bitfields = TEMPLATE_BITFIELDS.replace("@REGNAME@", n.upper())
        out = out.replace("@BITFIELDS@", bitfields)

        sf = ""
        for s in subfields:
            sf += f"        /// \n"
            sf += f"        {s["name"]} OFFSET({s["start"]}) NUMBITS({s["width"]}) [\n"
            for (vidx, v) in enumerate(s["values"]):
                val_str = bin(v)[2:]
                val_str = ("0"*s["width"] + val_str)[-s["width"]:]
                sf += f"            R_{vidx} = 0b{val_str},\n"
            sf += f"        ],\n\n"

        out = out.replace("@SUBFIELDS@", sf.rstrip())

        f.write(out)

[thejpster]

I tried to do something for AArch32, but I had issue that the JSON is only for Armv8-A, and is missing a bunch of Armv8-R and Armv7 specific stuff.

I think if we do do this, it can only be as a tool to help generate code ready for the author to do a pass and modify it as required, as opposed to something we just fire and forget.